Today's PCB design requirements for layout are becoming more and more strict, the layout basically determines the general direction and structure of the wiring, the division of the power supply and the ground plane, and the control of noise and EMI, so the performance of the PCB design is good or bad. Much depends on whether the layout is reasonable.

    Engineers often spend a lot of time and energy on layout. Pre-layout-pre-simulation-re-layout-optimization, these processes account for about 50% or more of the entire project design time.

    The following summarizes a rough layout steps and rules, for reference only.

    There are many other issues to be considered in the actual circuit design, such as heat dissipation, mechanical performance and the placement of some special circuits. The specific layout guidelines are determined according to the actual application.

    The layout first starts with understanding the circuit schematic of the system. You must divide digital, analog, and mixed digital / analog components in each circuit (you can view the chip information), and pay attention to the positioning of the power and signal pins of each IC chip.

    According to the proportion of each part in the circuit, the wiring area of the digital circuit and analog circuit on the PCB is initially divided, so that the digital components, analog components and their corresponding wiring are as far away as possible and limited to their respective wiring areas. After the area is divided, the components can be placed. The general order is hybrid devices-analog components-digital components-bypass capacitors.

    Mixed digital and analog components must be placed at the junction of the digital signal area and the analog signal area, and pay attention to the correct direction, that is, the digital signal and analog signal pins face the respective wiring areas; pure digital or analog components must be placed Within the range specified by each; the crystal oscillator circuit should be as close as possible to its driving device.

    Noise-sensitive devices should be kept away from high-frequency signal wiring. At the same time, signals that are sensitive to noise, such as the reference voltage Uref, should also be kept away from components that are prone to high noise.

    In general, digital components are placed as concentrated as possible, which can reduce the line length and reduce noise. But if it is a signal wiring with timing requirements, you need to adjust the layout according to the line length and structure, which should be determined by simulation. The bypass capacitor needs to be placed as close as possible to the power supply pin of the chip, especially the high-frequency capacitor. A large-capacity (such as 47uF) capacitor can be placed near the power interface to keep the power supply stable and reduce the interference of low-frequency noise.