We often find that there are errors in some rules or principles that we take for granted. Electronic engineers also have such examples in circuit design. Here are eight misconceptions summarized by an engineer.

Misunderstanding 1: The PCB board design requirements of this board are not high, so use a thinner wire and automatically distribute

Comments: Automatic wiring must occupy a larger PCB board area, and at the same time generate many times more vias than manual wiring. In large-volume products, the factors considered by circuit board manufacturers to reduce their prices are the line width and The number of holes, which respectively affects the yield of the PCB and the number of drill bits consumed, saves the supplier's cost, and finds a reason for the price reduction.

Misunderstanding 2: All bus signals should pulled by resistors

Comments: There are many reasons why signals need to be pulled up and down, but not all of them have to be pulled. The pull-up and pull-down resistors pull a simple input signal, and the current is less than tens of microamperes. However, if a driven signal is pulled, the current will reach milliamps. Current systems often have 32 bits of address data, and there may be After the 244/245 isolated bus and other signals are pulled up, a few watts of power will be consumed by these resistors.

Misunderstanding 3: How to deal with these unused I / O ports of CPU and FPGA? Okay, let it be empty first.

Comment: If the unused I / O port is left unconnected, it may become an input signal that is repeatedly oscillated by a small amount of external interference, and the power consumption of the MOS device basically depends on the number of inversions of the gate circuit. If you pull it up, each pin will also have microamp level current, so the best way is to set it as an output (of course, other driving signals cannot be connected to the outside)

Misunderstanding 4: There are so many doors left in this FPGA, so you can make use of the most of them.

Comment: The power consumption of FGPA is proportional to the number of flip-flops used and the number of flips, so the same type of FPGA may have a power difference of 100 times at different times in different circuits. Minimizing the number of high-speed flip-flops is a fundamental way to reduce FPGA power consumption.

Misunderstanding 5: The power consumption of these small chips is very low, don't worry.

Comment: It is difficult to determine the power consumption of a chip that is not complicated internally. It is mainly determined by the current on the pin. An ABT16244 consumes less than 1 milliamp without a load, but its indicator is each pin. It can drive a load of 60 milliamps (such as matching a resistance of several tens of ohms), that is, the maximum power consumption at full load can reach 60 * 16 = 960mA, of course, only the power supply current is so large, and the heat has fallen on the load.

Misunderstanding 6: The memory has so many control signals. My board only needs to use the OE and WE signals. The chip selection is grounded. This way, the data comes out much faster during read operations.

Comments: The power consumption of most memories will be more than 100 times greater than when the chip select is inactive (regardless of OE and WE), so CS should be used to control the chip as much as possible, and to meet other requirements as much as possible May shorten chip select pulse width.

Myth 7: Why are these signals overshooting? As long as it matches well.

Comments: Except for a few specific signals (such as 100BASE-T, CML), there are overshoots. As long as they are not large, they do not necessarily need to match, and even if they do not match, they do not need to match best. For example, the output impedance of TTL is less than 50 ohms, and some even 20 ohms. If such a large matching resistor is also used, the current will be very large, the power consumption will be unacceptable, and the signal amplitude will be too small to be used. Besides, the output impedance of the general signal when the output high level and the output low level are not the same, and there is no way to completely match. Therefore, the matching of TTL, LVDS, 422 and other signals is acceptable as long as the overshoot is acceptable.

Misunderstanding 8: Reducing power consumption is a matter for hardware personnel, and it has nothing to do with software.

Comment: The hardware is just a stage, but the opera is software. The access of almost every chip on the bus and the inversion of each signal are almost controlled by the software. Use more internal CACHE, etc.), respond to interrupts in time (interrupts are often active low and have pull-up resistors), and other specific measures for specific boards will greatly contribute to reducing power consumption.

Eight Misunderstandings in Circuit Design